| Cat
No. |
Description |
|
898 |
Digital Trainer Kit to Verify Adders
Subtractors using OR, EX-OR, AND NOT gates.
Objective : To verify the truth table of Digital Half Adder, Half
Subtractor, Full Adder
Full Subtractor using OR, AND, EX-OR NOT gates.
Features : Instrument comprises of DC Regulated Power Supply
5V/150mA for logic inputs, 4 SPDT switches provided for selecting logic
'1' logic '0', 2 Red LED output indicators, circuit diagram printed for
1 two input 'OR' gate, 2 two input 'AND' gates, 2 'NOT' gates 2 EX-OR
gates their respective IC's placed inside the cabinet connections
brought out at sockets. |
| |
|
899 |
Digital Trainer to Verify Half Adder
using OR, EX-OR AND gates. |
|
|
|
900 |
Digital Trainer to Verify Half
Subtractor using OR, EX-OR AND gates. |
| |
|
901 |
Digital Trainer to Verify Full Adder
using OR, EX-OR AND gates. |
| |
|
902 |
Digital Trainer to Verify Full
Subtractor using OR, EX-OR AND gates. |
| |
|
903 |
Digital Trainer to Verify Adders
Subtractors using NAND Gates.
Objective : To verify the truth table of Digital Half Adder, Half
Subtractor, Full Adder
Full Subtractor using NAND gates.
Features : Instrument comprises of DC Regulated Power Supply 5
VDC/150mA for
logic inputs, 3 SPDT switches provided for selecting logic '1' logic
'0', 3 NOT gates for providing compliments of the logic inputs, 2 Red
LED output indicator, circuit diagram printed for 5 three input 'NAND'
gate their respective IC's placed inside the cabinet connections brought
out at sockets. |
| |
|
904 |
Digital Trainer to study verify truth
tables of Flip Flops.
Objective : To study verify Truth tables of 'RS', 'D' Type, 'T'
Type, 'JK' 'JK Master
slave' flip flops using TTL IC's.
Features : Instrument comprises of DC Regulated Power Supply 5
VDC/150mA, 4
logic inputs, logic '1' logic '0' selectable using SPDT switches, 1 Hz
monoshot clock pulse, Two output indicators, Circuit diagram for 'RS', 'JK'
'JK Master Slave' flip-flops are Printed, their respective IC's placed
inside the cabinet connections for inputs outputs brought out on the
sockets, 1 NOT gate for converting 'RS' flip-flop to 'D' type flip-flop. |
|
|
|
905 |
Study verify Truth tables of 'RS' 'D'
Type flip flops using NAND & NOT gates.
Objective : To Verify Truth table of RS D type flip flops using NAND
gates.
Features : Instrument comprises of DC Regulated Power Supply
5VDC/150mA, 2 Logic '1' 2 Logic '0' inputs, 1 Hz monoshot clock pulse,
Two output indicators, Circuit diagram for 'RS' flip-flop is Printed
connections for inputs outputs brought out at the sockets, 1 NOT gate
for converting 'RS' flip-flop to 'D' type flip-flop. |
|
|
|
906 |
Study Verify Truth table of 'JK' 'T'
type flip flops using NAND gates.
Objective : To Verify Truth table of 'JK' 'T' type flip flops
using NAND gates.
Features : Instrument comprises of DC Regulated Power Supply
5VDC/150mA, 4 SPDT switches provided for selecting logic '1' logic '0',
1 Hz monoshot clock pulse, Two output indicators, Circuit diagram for 'JK'
flip-flop is Printed connections for inputs outputs brought out at the
sockets on the front panel. |
|
|
|
907 |
Study Verify Truth tables of 'JK' 'JK
Master slave' flip flop.
Objective : To Verify Truth table of 'JK' 'JK Master Slave flip
flops IC 7472 IC 7476.
Features : Instrument comprises of DC Regulated Power Supply 5
VDC/150mA, 4
SPDT switches provided for selecting logic '1' logic '0', 1 Hz monoshot
clock pulse, Two output indicators, Circuit diagram for 'JK' 'JK Master
Slave' flip-flops are Printed connections for inputs outputs brought out
at the sockets on the front panel. |
|
|
|
908 |
Study of 4 Bit Binary to Gray Code
Convertor
Features : Instument comprises of DC Regulated Power Supply 5 VDC/150mA,
4
Logic inputs selectable using SPDT switches, 4 output LED indicators,
Circuit diagram Printed, IC's placed inside connections brought out at
sockets on the front panel. |
|
|
|
909 |
Study of 4 Bit Ripple Counter Forward
Reverse.
Objective : To Verify Truth tables of 4 Bit Forward Reverse
Counters using 4 JK Flip Flops.
Features : Instrument comprises of DC Regulated Power Supply 5
VDC/150mA, 1 Hz monoshot clock pulse, Two output indicators, Circuit
diagram for 4 'JK' flip-flops Printed connections for inputs outputs
brought out at sockets on front panel. |
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